By P. Lamaty, B. Mazar, D. Demigny, L. Kessal, M. Karabernou (auth.), Prof. Michel Robert, Prof. Bruno Rouzeyre, Prof. Christian Pi
The eleven th IFIP foreign convention on Very huge Scale Integration, in Montpellier, France, December 3-5,2001, used to be an excellent good fortune. the main target used to be approximately IP Cores, Circuits and process Designs & purposes in addition to SOC layout equipment and CAD. This e-book includes the easiest papers (39 between 70) which have been offered through the convention. these papers take care of all elements of significance for the layout of the present and destiny built-in platforms. method on Chip (SOC) layout is at the present time an enormous problem for designers, as a SOC may possibly include very assorted blocks, reminiscent of microcontrollers, DSPs, stories together with embedded DRAM, analog, FPGA, RF front-ends for instant communications and built-in sensors. the whole layout of such chips, in very deep submicron applied sciences right down to 0.13 mm, with a number of thousands of thousands of transistors, provided at lower than 1 Volt, is a truly tough activity if layout, verification, debug and business try out are thought of. The microelectronic revolution is interesting; fifty five years in the past, in overdue 1947, the transistor used to be invented, and everyone is aware that it was once by way of William Shockley, John Bardeen and Walter H. Brattein, Bell mobile Laboratories, which acquired the Nobel Prize in Physics in 1956. most likely, all people thinks that it was once well-known instantly as a massive invention.
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Extra info for SOC Design Methodologies: IFIP TC10 / WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC’01) December 3–5, 2001, Montpellier, France